HuC6280 opcode matrix

W
= 6502 (NMOS)
instructions
W
= 65C02 (WDC)
added instructions
W
= HuC6280
added instructions
x0x1x2x3x4x5x6x7 x8x9xAxBxCxDxExF
0x BRK
ORA
ix
SXY
ST0
im
TSB
zp
ORA
zp
ASL
zp
RMB0
zp
PHP
ORA
im
ASL

TSB
ab
ORA
ab
ASL
ab
BBR0
zp rel
1x BPL
rel
ORA
iy
ORA
zpind
ST1
im
TRB
zp
ORA
zpx
ASL
zpx
RMB1
zp
CLC
ORA
aby
INC

TRB
ab
ORA
abx
ASL
abx
BBR1
zp rel
2x JSR
ab
AND
ix
SAX
ST2
im
BIT
zp
AND
zp
ROL
zp
RMB2
zp
PLP
AND
im
ROL

BIT
ab
AND
ab
ROL
ab
BBR2
zp rel
3x BMI
rel
AND
iy
AND
zpind

BIT
zpx
AND
zpx
ROL
zpx
RMB3
zp
SEC
AND
aby
DEC

BIT
abx
AND
abx
ROL
abx
BBR3
zp rel
4x RTI
EOR
ix
SAY
TMA
im
BSR
rel
EOR
zp
LSR
zp
RMB4
zp
PHA
EOR
im
LSR

JMP
ab
EOR
ab
LSR
ab
BBR4
zp rel
5x BVC
rel
EOR
iy
EOR
zpind
TAM
im
CSL
EOR
zpx
LSR
zpx
RMB5
zp
CLI
EOR
aby
PHY


EOR
abx
LSR
abx
BBR5
zp rel
6x RTS
ADC
ix
CLA

STZ
zp
ADC
zp
ROR
zp
RMB6
zp
PLA
ADC
im
ROR

JMP
abind
ADC
ab
ROR
ab
BBR6
zp rel
7x BVS
rel
ADC
iy
ADC
zpind
TII
blk
STZ
zpx
ADC
zpx
ROR
zpx
RMB7
zp
SEI
ADC
aby
PLY

JMP
abindx
ADC
abx
ROR
abx
BBR7
zp rel
8x BRA
rel
STA
ix
CLX
TST
imzp
STY
zp
STA
zp
STX
zp
SMB0
zp
DEY
BIT
im
TXA

STY
ab
STA
ab
STX
ab
BBS0
zp rel
9x BCC
rel
STA
iy
STA
zpind
TST
imab
STY
zpx
STA
zpx
STX
zpy
SMB1
zp
TYA
STA
aby
TXS

STZ
ab
STA
abx
STZ
abx
BBS1
zp rel
Ax LDY
im
LDA
ix
LDX
im
TST
imzpx
LDY
zp
LDA
zp
LDX
zp
SMB2
zp
TAY
LDA
im
TAX

LDY
ab
LDA
ab
LDX
ab
BBS2
zp rel
Bx BCS
rel
LDA
iy
LDA
zpind
TST
imabx
LDY
zpx
LDA
zpx
LDX
zpy
SMB3
zp
CLV
LDA
aby
TSX

LDY
abx
LDA
abx
LDX
aby
BBS3
zp rel
Cx CPY
im
CMP
ix
CLY
TDD
blk
CPY
zp
CMP
zp
DEC
zp
SMB4
zp
INY
CMP
im
DEX

CPY
ab
CMP
ab
DEC
ab
BBS4
zp rel
Dx BNE
rel
CMP
iy
CMP
zpind
TIN
blk
CSH
CMP
zpx
DEC
zpx
SMB5
zp
CLD
CMP
aby
PHX


CMP
abx
DEC
abx
BBS5
zp rel
Ex CPX
im
SBC
ix

TIA
blk
CPX
zp
SBC
zp
INC
zp
SMB6
zp
INX
SBC
im
NOP

CPX
ab
SBC
ab
INC
ab
BBS6
zp rel
Fx BEQ
rel
SBC
iy
SBC
zpind
TAI
blk
SET
SBC
zpx
INC
zpx
SMB7
zp
SED
SBC
aby
PLX


SBC
abx
INC
abx
BBS7
zp rel

Instructions new to the HuC6280:

SWAP registers

SAX, SAY, SXY

CLEAR (zero-out) registers

CLA, CLX, CLY

TRANSFER Acc <-> MPR registers

TAM n, TMA n

TEST bits

TST n abs/zp (,x)

TRANSFER Block

TII ssss dddd llll
TDD, TIA, TAI, TIN

STORE to VDC ports

ST0 n, ST1 n, ST2 n

BRANCH to Subroutine

BSR

CLOCK Speed set

CSH, CSL

SET T flag (routes next arithmetic instruction through <$00+X rather than Accumulator)

SET

From Chris Covell's PCE Tutorial

(Original Page HERE)